2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1 3 5 7 9 11 13 15 17 19 21 24 25 27 29
(at the computer)
30 PIN ??? CONNECTOR at the computer.
Pin | Name | Description |
---|---|---|
1 | GND | Ground |
2 | GND | Ground |
3 | VCC | +5 VDC |
4 | VCC | +5 VDC |
5 | SD1 | Data Bus 1 |
6 | SD0 | Data Bus 0 |
7 | SD3 | Data Bus 3 |
8 | SD2 | Data Bus 2 |
9 | SD5 | Data Bus 5 |
10 | SD4 | Data Bus 4 |
11 | SD7 | Data Bus 7 |
12 | SD6 | Data Bus 6 |
13 | /SDREQ | DMA Request |
14 | /INTX | Interrupt Request |
15 | /CSS | Chip Select |
16 | /SDACK | DMA Acknowledge |
17 | /IOR | I/O Read |
18 | /IOW | I/O Write |
19 | A8 | Address Bus 8 |
20 | 7M | 7.16 MHz System Clock |
21 | A6 | Address Bus 6 |
22 | A7 | Address Bus 7 |
23 | A4 | Address Bus 4 |
24 | A5 | Address Bus 5 |
25 | A2 | Address Bus 2 |
26 | A3 | Address Bus 3 |
27 | /IFRST | +5 VDC |
28 | A1 | Address Bus 1 |
29 | GND | Ground |
30 | GND | Ground |
Contributor: | Joakim Ögren |
Source: | Darren Ewaniuk's CDTV Technical Information |
Copyright © The Hardware Book Team 1996-2004.
May be copied and redistributed, partially or in whole, as appropriate.
Document last modified: 2002-01-10